72 WDT_A_hold(WDT_A_BASE);
75 CS_initClockSignal(CS_ACLK,CS_REFOCLK_SELECT,CS_CLOCK_DIVIDER_1);
77 CS_initClockSignal(CS_SMCLK,CS_DCOCLKDIV_SELECT,CS_CLOCK_DIVIDER_1);
79 CS_initClockSignal(CS_MCLK,CS_DCOCLKDIV_SELECT,CS_CLOCK_DIVIDER_1);
82 GPIO_setAsPeripheralModuleFunctionInputPin(
87 GPIO_setAsPeripheralModuleFunctionInputPin(
102 EUSCI_A_UART_initParam
param = {0};
103 param.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK;
104 param.clockPrescalar = 8;
105 param.firstModReg = 0;
106 param.secondModReg = 0xD6;
107 param.parity = EUSCI_A_UART_NO_PARITY;
108 param.msborLsbFirst = EUSCI_A_UART_LSB_FIRST;
109 param.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT;
110 param.uartMode = EUSCI_A_UART_MODE;
111 param.overSampling = EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION;
117 EUSCI_A_UART_enable(EUSCI_A0_BASE);
119 EUSCI_A_UART_clearInterrupt(EUSCI_A0_BASE,
120 EUSCI_A_UART_RECEIVE_INTERRUPT);
123 EUSCI_A_UART_enableInterrupt(EUSCI_A0_BASE,
124 EUSCI_A_UART_RECEIVE_INTERRUPT);
127 __enable_interrupt();
133 EUSCI_A_UART_transmitData(EUSCI_A0_BASE,
TXData);
143 #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
144 #pragma vector=USCI_A0_VECTOR
146 #elif defined(__GNUC__)
147 __attribute__((interrupt(USCI_A0_VECTOR)))
151 switch(__even_in_range(UCA0IV,USCI_UART_UCTXCPTIFG))
153 case USCI_NONE:
break;
154 case USCI_UART_UCRXIFG:
155 RXData = EUSCI_A_UART_receiveData(EUSCI_A0_BASE);
163 case USCI_UART_UCTXIFG:
break;
164 case USCI_UART_UCSTTIFG:
break;
165 case USCI_UART_UCTXCPTIFG:
break;
MPU_initThreeSegmentsParam param